Samsung advancing toward single-digit nano tech

By Yoon Sung-won

Samsung Electronics said Monday it has introduced 10-nano process for the mass-production of system large-scale integration (LSI) semiconductor chips for the first time in the world.

The 10-nano semiconductor products will first be adopted for devices to be rolled out early next year, the company said. It also underlined that it plans to capitalize on the cutting-edge technology for futuristic functionalities.

“Starting from the mass-production in the first-generation of 10-nano process (10LPE), we are developing the second-generation process (10LPP) for commercial use by 2017,” a Samsung Electronics official said. “Even after the second-generation process, we plan to use the 10-nano process for a long time through continuous improvements.”

As Samsung Electronics faces challenges by its system LSI sector rivals TSMC and Intel in the race to introduce single-digit nano processes, the company, which already has leadership with the current 14-nano process, is expected to push for the 10-nano process as an efficient and reliable buffer before it introduces the next-generation 7-nano technology in 2018 at the earliest.

“Considering the overall trends, the 10-nano is the most effective process with the best commercial viability for now,” Samsung Electronics System LSI Marketing Vice President Ben Hur said during a conference call earlier in July. “We are ready to release the prototype of 7-nano product anytime. But what matters is when to commercialize it.”

Last week, TSMC said it started developing the 3-nano process. The world’s largest semiconductor foundry enterprise, which used to manufacture mobile application processors (AP) for Apple alongside Samsung Electronics, recently became the sole provider of APs for Apple’s iPhone 7 and the larger 7 Plus.

In the meantime, Samsung Electronics has produced Qualcomm’s 14-nano Snapdragon 820 processors as well as its own Exynos APs. The company is expected to produce Qualcomm’s Snapdragon 830 APs through the new 10-nano process by the end of this year.

Samsung Electronics said the first-generation 10-nano process has 27 percent higher performance, 40 percent less energy consumption and about 30 percent more manufacturing output per wafer compared to the first-generation 14-nano process.

For the 10-nano process, the company has applied the triple-patterning technology, which repeats patterning of elaborate circuit design on a wafer board three times, to the equipment it has used for the 14-nano process.

“The introduction of 10-nano logic process proved that our nano process technology is leading the industry,” Samsung Electronics’ system LSI division foundry business executive vice president Yoon Jong-shik said. “We will boost the system LSI business by continuing to secure nano process technologies and provide clients with differentiated semiconductor products.”

Aiming at expanding its presence in the foundry business, the company said it is working with its clients and partners to verify the design tool for 10-nano process and providing them with design kits.

Meanwhile, the company said last week it expanded the application of its 14-nano process technology to the manufacturing of its Exynos AP for wearable devices. It has already applied the 14-nano process both premium and middle-class mobile device APs since early this year.

“The new product suggests a new paradigm of wearable system-on-a-chip based on low power technology, integrated modem and connectivity as well as innovative packaging technology,” Hur said. “This will dramatically extend use time of devices and realize slimmer designs, contributing to the advancement of wearable devices.”