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XCENA showcases CXL memory solution for SK hynix at OCP Global Summit

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Summary

XCENA demonstrated CXL-based memory solutions with SK hynix at the 2026 OCP Global Summit in San Jose on Friday. Its MX1 controller enabled shared KV cache across AI inference servers and in-memory search to reduce data movement. XCENA also showcased MX1 with SK hynix’s CXL Hybrid Memory, combining DRAM and SSDs to expand AI-server memory capacity. The companies are testing the technology in real-world AI inference environments.


Key Facts

  • CXL allows multiple processors to share and expand memory by drawing from a shared memory pool.
  • MX1 is a CXL-based memory controller chip developed by XCENA for AI inference workloads.
  • XCENA’s InfiniteMemory feature connects SSDs to a CXL-based memory system, enabling AI servers to access more data without relying entirely on DRAM.
  • XCENA said its approach provides greater capacity scalability than conventional DRAM-based CXL expansion while delivering faster performance than SSDs alone.
  • XCENA CEO Jin Kim said improving AI infrastructure depends on memory utilization and reducing data movement, not only computing power.
By Nam Hyun-woo
  • Published Oct 16, 2026 3:50 pm KST
Audiences visit XCENA's booth at 2026 OCP Global Summit held from Monday to Thursday (local time) in San Jose, Calif. Courtesy of XCENA

Audiences visit XCENA's booth at 2026 OCP Global Summit held from Monday to Thursday (local time) in San Jose, Calif. Courtesy of XCENA

A demonstration of XCENA's MX1 based CXL memory pooling system / Courtesy of XCENA

A demonstration of XCENA's MX1 based CXL memory pooling system / Courtesy of XCENA

XCENA, a Korean fabless semiconductor company developing memory infrastructure, said Friday it demonstrated new memory solutions based on Compute Express Link (CXL) technology at the 2026 OCP Global Summit in San Jose, showcasing its shared-memory technology in collaboration with SK hynix.

CXL is a high-speed connection standard allowing multiple processors to share and expand memory beyond what is physically attached to them by drawing from a shared pool of memory. It is gaining attention as a key technology for optimizing performance as memory demands grow in workloads such as artificial intelligence (AI) inference.

During the event, XCENA demonstrated two AI inference use cases built on MX1, its CXL-based memory controller chip.

The first demonstration showed multiple AI inference servers sharing key value cache memory (KV cache) through a CXL memory pool. KV cache stores context a model has already processed so it can be reused when generating responses. Keeping it in a shared pool reduces redundant copies and data movement across servers.

The second demonstration showed how MX1 can speed up the process of finding information relevant to a user's query. Instead of transferring large amounts of data from memory to a server's processor for searching, MX1 performs the search directly in memory, reducing data movement and improving processing speed.

During the event, XCENA also showcased its MX1 chip built for SK hynix’s CXL Hybrid Memory. The two companies are collaborating to expand memory capacity for AI servers by using not only DRAM but also solid-state drives (SSDs), which offer greater storage capacity at a lower cost.

SK hynix's CXL Hybrid Memory based on XCENA's MX1 chip is displayed at the former's booth at 2026 OCP Global Summit held from Monday to Thursday (local time) in San Jose, Calif. Courtesy of XCENA

SK hynix's CXL Hybrid Memory based on XCENA's MX1 chip is displayed at the former's booth at 2026 OCP Global Summit held from Monday to Thursday (local time) in San Jose, Calif. Courtesy of XCENA

The collaboration is based on MX1’s InfiniteMemory feature, which connects SSDs to a CXL-based memory system, allowing AI servers to access much larger amounts of data without relying entirely on expensive DRAM. According to XCENA, the approach offers greater capacity scalability than conventional DRAM-based CXL memory expansion while delivering faster performance than SSDs alone. The companies are now testing the technology in real-world AI inference environments.

“Improving AI infrastructure performance and efficiency is no longer solely a compute challenge. It also depends on how effectively memory is used and how much data movement can be eliminated,” XCENA CEO Jin Kim said. “At OCP, we demonstrated how MX1 supports real-world AI workloads, and we will keep working with partners across the ecosystem to advance next-generation AI memory infrastructure.”



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