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Samsung expected to lead high-performance tier in Nvidia’s dual-binning strategy

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Samsung Electronics' high-bandwidth memory 4 / Courtesy of Samsung Electronics

Samsung Electronics' high-bandwidth memory 4 / Courtesy of Samsung Electronics

Samsung Electronics is expected to gain an edge in supplying high-performance high-bandwidth memory 4 (HBM4) to Nvidia, as the U.S. artificial intelligence (AI) giant is expected to adopt a two-tier binning strategy under which it will release AI accelerators in both high-performance and standard versions.

According to industry officials, Thursday, Nvidia is considering securing HBM4 chips for its upcoming Vera Rubin platform by binning the memory into two tiers, allowing it find a balance between stable supply and top-tier products.

While Nvidia has been highlighting the performance of Vera Rubin platform, the current supply bottleneck in the memory chip industry is casting uncertainties over securing sufficient volumes highest-performance chips. Given the higher cost burden, it is difficult to fill all volumes exclusively with the highest-performance chips.

To address this, Nvidia is expected to apply HBM4 chips with data processing speeds of 11.7 gigabits per second (Gbps) or higher to its flagship accelerators, while using 10 Gbps-class chips for standard-tier products, the officials said.

Samsung Electronics is expected to be the biggest beneficiary if Nvidia takes such a strategy.

While announcing its HBM4 shipment earlier this month, Samsung Electronics also said that its HBM4 achieved 11.7 Gbps of consistent data processing speed, exceeding the Joint Electron Device Engineering Council’s standard of 8 Gbps, and the maximum speed can reach up to 13 Gbps.

At the time, Samsung noted that it used 1c DRAM node process, the sixth-generation of its kind and the most advanced, to achieve that performance. The company’s main rival SK hynix is using a previous-generation 1b process for HBM4 to focus on stability.

As Samsung’s product relies on advanced technology, it may take time to improve manufacturing yields, limiting the company’s ability to rapidly scale up shipments.

In addition, Samsung’s HBM4 is expected to carry a higher price tag, estimated at around $700 per chip, about 20 percent to 30 percent higher than its predecessor, HBM3E.

Against this backdrop, industry officials expect SK hynix to secure the largest share in terms of overall volume, potentially close to 50 percent, but Samsung Electronics’ HBM4 could take a dominant position in the top-tier bin.

“With mitigating data bottlenecks becoming key to improving the performance of next-generation AI accelerators, Samsung Electronics’ role could expand if Nvidia strategically seeks to secure top-tier products,” an industry official said.

KB Securities analyst Kim Dong-won estimated that Samsung Electronics could account for nearly 40 percent of the HBM4 market, noting that its 1c DRAM and 4-nanometer logic die processes are enabling performance expectations to be exceeded.