SK hynix develops new DDR4 DRAM chips
Seen are SK hynix's second-generation 10-nanometer class 8-gigabit DDR4 DRAM chips. / Courtesy of SK hynix
By Baek Byung-yeul
SK hynix has completed the development of an 8-gigabit DDR4 DRAM chip using advanced production technology, the world's No.2 DRAM chipmaker said Monday.
The company said it increased production capacity for the second-generation 10-nanometer class 8-gigabit DDR4 DRAM chips by 20 percent and reduced power consumption by more than 15 percent, compared to the previous generation.
SK said the new product will be used in the servers and PC segments and later in other areas such as mobile devices.
“This 1Ynm 8Gb DDR4 DRAM has optimum performance and density for our clients,” said Sean Kim, the firm's vice president and head of DRAM marketing. “SK Hynix plans to start shipping from the first quarter of next year,” he added.
SK said the DRAM market may be hit by market uncertainties due to rising global trade tensions and a DRAM price decline, but previously said it will respond actively to market changes through the development of new manufacturing processes.
The announcement is about a year late compared to its competitor Samsung Electronics. The world's No.1 DRAM maker began mass production of second-generation 10-nano class DDR4 DRAM chips in November 2017. According to market researcher DRAMeXchange, SK hynix has a market share of 29.9 percent in the world's DRAM market in the second quarter of 2018 while Samsung led the market with 43.6 percent.
The chipmaker claimed its new product has competency comparable to other products as it supports a data transfer rate of up to 3,200 megabits per second, which is the fastest data processing speed for the DDR4 standard.
“SK hynix adopted a four-phase clocking technology, which doubles the clock signal to boost data transfer speed and stability,” an SK official said.
To reduce power consumption and data errors, the company also applied its “Sense Amp. Control” technology to the new product. With the technology, the firm improved the transistor structure to lower the possibility of data errors. The chipmaker also added a low-power power supply to the circuit to prevent unnecessary power consumption.