CXMT's new DRAM tech to test Korean memory makers' dominance

By Nam Hyun-woo

• Published Oct 13, 2026 4:18 PM KST

Questions remain over Chinese memory giant's technological leap

Concerns are growing that the technological gap between China's CXMT and Korean memory makers Samsung Electronics and SK hynix in DRAM technology has already narrowed, after the Chinese company unveiled plans to launch server memory product by the end of this year featuring a next-generation memory cell architecture that remains only on the technology road maps of the two Korean chipmakers.

According to South China Morning Post and other Chinese media outlets, CXMT President Cao Kanyu said the company plans to roll out a new server DDR5 based featuring the new architecture during an industrial event in Shanghai on Saturday.

The new architecture uses a design called 4F square, which reduces the space occupied by each memory cell. F refers to the minimum line width that a given DRAM manufacturing process can draw. In current processes such as 1a, 1b and 1c, F is just over 10 nanometers. 4F square means each cell occupies an area equivalent to four times F squared.

The current industry standard is 6F square, meaning the new technology could theoretically reduce the area occupied by each memory cell by 33 percent and allow 50 percent more cells to fit into the same space, increasing the amount of data that can be stored on a chip.

Shrinking memory cells requires technological breakthroughs, such as arranging transistors vertically rather than horizontally. Samsung Electronics and SK hynix have been developing technologies such as Vertical Channel Transistors, but their plans to adopt the new cell architecture remain on their technology road maps.

In April, reports claimed that Samsung Electronics identified a working die based on 4F square cell architecture while developing sub-10-nanometer DRAM using process called 10a. Industry observers expect the company may begin 4F square DRAM production in 2028, but Samsung has yet to officially announce a timeline.

SK hynix also unveiled a technology road map in Japan in June last year outlining plans to introduce a 4F square platform for sub-10-nanometer DRAM, but has not disclosed a mass production schedule.

Against this backdrop, CXMT said it is working to reduce memory cell size and increase storage density using its proprietary Vertical Surrounded Gate transistor architecture.

Although details regarding mass production, customer qualification, yields and shipment volumes remain unconfirmed, the announcement has fueled concerns that China's technological advances in DRAM could extend from consumer memory products to higher-value server DRAM.

Shares of global memory makers, including Micron Technology and Sandisk, reacted to the news on Monday, followed by Samsung Electronics and SK hynix, whose shares fell 7.39 percent and 10.09 percent, respectively, on Tuesday.

Though the announcement affected share prices in the market which has become increasingly sensitive to semiconductor-related news, industry officials largely agree that it is too early to assess the implications.

“There is a difference between announcing plans to launch a product and actually bringing it to market,” an industry official said. “We need to look at productivity, production yields, which customers will buy the products and whether they have passed customer qualification. These are the factors that will ultimately determine whether CXMT can translate its technology into actual sales.”

Technical questions are also emerging. Until recently, CXMT had been producing DRAM using a roughly 16-nanometer process, equivalent to the 1y to 1z generations. While the company seeks to advance to finer processes such as 1a, 1b and 1c, U.S.-led export restrictions have prevented it from obtaining extreme ultraviolet lithography equipment.

This raises questions about how much CXMT can actually reduce memory cell size by switching from a 6F square to a 4F square architecture while its minimum feature size, F, remains relatively large.

Industry observers say Samsung Electronics and SK hynix's plans to adopt 4F square architectures only at sub-10-nanometer process nodes also reflect considerations of cost-effectiveness and production efficiency. From this perspective, CXMT's transition to 4F square could be seen as an alternative approach to reducing cell size when further process miniaturization remains difficult.

“Major memory chipmakers are capable of producing working samples at the R&D stage, but they do not make aggressive announcements because those samples are not commercial products,” another industry official said.

“CXMT appears to have made an aggressive announcement to impress the market following its recent initial public offering. With the entire memory market facing supply shortages, there is still room for companies like CXMT to gain ground in commodity memory products. But I have not heard of CXMT or YMTC securing any major orders in the data center or server markets. I think the market is reacting too sensitively, and it is still too early to say that the technology gap has completely closed.”